1. Field of the Invention
The invention pertains to an apparatus, and a corresponding method, for stress testing semiconductor chips.
2. Description of the Related Art
There is now a great need to detect faulty semiconductor integrated circuit devices (hereinafter referred to as semiconductor chips) before such semiconductor chips are mounted onto electronic packages, such as multi-chip modules (MCMs). This need arises from the fact that if a faulty chip is detected only after it is mounted onto, for example, an MCM, it may be necessary to scrap the entire MCM, even though the other semiconductor chips on the MCM are not defective.
Stress testing of semiconductor chips, i.e. , electrically testing semiconductor chips while subjecting the chips to elevated temperatures, is now recognized as an effective method for detecting faulty chips before such chips are mounted onto, for example, MCMs. As a result, the development of apparati for carrying out such stress testing, particularly apparati which can be used to sequentially test a large number of individual semiconductor chips, has become important. Because semiconductor chips are either wire bond-type semiconductor chips, i.e. , semiconductor chips having electrical contact pads to which wire bonds are to be attached, or are C4-type semiconductor chips, i.e. , semiconductor chips having contact pads to which C4 (controlled collapse chip connection) solder balls have been attached, the development of apparati capable of carrying out stress testing of both wire bond-type semiconductor chips and C4-type semiconductor chips has become particularly important.
One apparatus which has been developed to achieve stress testing of wire bond-type semiconductor chips includes a clamp housing containing a spring at its upper end. A substantially rigid and inflexible base is positioned at the lower end of the clamp housing. This base includes a depression in its upper surface, which contains an elastomeric insert. A flexible, polyimide layer overlies the base and insert. The upper surface of the flexible, polyimide layer includes a plurality of gold bumps.
In the operation of the above-described apparatus, a wire bond-type semiconductor chip is placed on the upper surface of the flexible, polyimide layer, directly over the elastomeric insert and directly beneath the spring. By pressing the clamp housing toward the base, a force is applied to the back of the semiconductor chip through the spring. As a result of this force, the contact pads on the semiconductor chip are brought into electrical contact with the gold bumps on the flexible, polyimide layer. While in this configuration, test voltages and/or test currents are applied to the gold bumps, and thereby applied to the contact pads, and the apparatus and semiconductor chip are heated to an elevated temperature.
Significantly, the total force which must be applied to the back of the semiconductor chip to achieve good electrical contact between the chip contact pads and the gold bumps corresponds to a force of 0.5 newtons or more being applied to each contact pad. This constitutes a relatively large force per chip contact pad and is thought to be due, in part, to the fact that each gold bump electrically contacts a corresponding chip contact pad at only a single point. Unfortunately, so large a force per chip contact pad often results in unacceptable, physical damage to the semiconductor chip.
Thus, those engaged in the development of apparati, and corresponding methods, for stress testing semiconductor chips have sought, thus far without success, apparati and methods which do not damage chips, which can be used to sequentially test a large number of chips and which can be used to test both wire bond-type chips and C4-type chips.